The present invention relates to a process for fabricating a power semiconductor device and more particularly a III-nitride power semiconductor device.
A well known III-nitride power semiconductor device includes a substrate, a III-nitride transition layer, and a heterojunction III-nitride device over the transition layer. Such devices have been known to include a parasitic conduction path from the heterojunction device to the substrate. The parasitic conduction path is undesirable in that it undermine the ability of the device to switch current effectively.
It is desirable to minimize the effect of or to eliminate the parasitic conduction path in III-nitride heterojunction devices.